Marvell (NASDAQ: MRVL) today introduced its new OCTEON® 10 DPU designed to accelerate and process a broad spectrum of security, networking, and storage workloads required by demanding 5G, cloud, carrier and enterprise datacenter applications. With the increasing shift of workloads to the cloud, complex security requirements and the growing number of edge devices the demand for data centric compute has accelerated. By combining compute with best-in-class hardware accelerators, Marvell’s OCTEON 10 DPU offers a significant TCO advantage and features numerous industry firsts. Delivering three times the performance and 50 percent lower power compared to previous generations of OCTEON, the newly announced solution is the first to be designed on a 5nm process to incorporate Arm® Neoverse™ N2 cores, as well as the first inline artificial intelligence/machine learning (AI/ML) hardware acceleration, the first integrated 1 terabit switch and the first to incorporate vector packet processing (VPP) hardware accelerators.
“To meet and exceed the growing data processing requirements for network, storage, and security workloads, Marvell focused on significant DPU innovations across compute, hardware accelerators, and high speed I/O,” said John Sakamoto, vice president of Marvell’s Infrastructure Processors Business Unit. “The OCTEON 10 brings compute leadership, supports networking and security workloads exceeding 400G, and incorporates leading edge I/O including DDR5 and PCIe 5.0.”
“We would like to congratulate Marvell on the launch of their industry-leading OCTEON 10 DPU family. Working closely with industry leaders like Marvell, Samsung has been providing wide array of powerful 5G solutions that meet the diverse needs from mobile operators,” said Sung-Won Lee, vice president, Networks Business at Samsung Electronics. “Together with our ecosystem partners, Samsung will continue to develop and advance mobile technologies to drive the next phase of 5G that will elevate mobile experiences.”
“Marvell’s OCTEON 10 DPUs offer enhanced packet processing capability for parsing, classification, and inline IPSec,” said Daniel Newman, founding partner at Futurum Research. “What makes Marvell’s OCTEON 10 DPU exciting are the new, innovative hardware accelerators incorporated to meet the need for inline machine learning and vector packet processing as well as a 1 Terabit switch.”
“A significant amount of compute is required to process the deluge of data generated from cloud to edge devices today,” said Chris Bergey, senior vice president and general manager, Infrastructure Line of Business, Arm. “The combination of leading-edge 5nm technology, Neoverse N2 cores and OCTEON 10 will enable Marvell to take on complex workloads, and showcase its strengths in DPU computing.”
Unlike other DPU solutions, which are limited to data center use cases, Marvell’s OCTEON 10 is scalable to service the most demanding hyperscale cloud workloads, carrier and enterprise datacenters, 5G wireless transport, SD-WAN, and even fanless networking edge boxes. To deliver best-in-class power and performance across these applications, each OCTEON 10 device combines the optimal mix of compute, hardware acceleration, data path bandwidth, and industry-leading I/O including PCIe 5.0 and DDR5.
The OCTEON 10 family SDK is an open platform which leverages the Arm ecosystem. The SDK support includes networking, security, and storage stacks, comprehensive DPDK and VPP extensions, and support for virtualization and containers.